The entire circuit of FIG. 1 will be referred to herein as an operational amplifier. FIG. 1 illustrates a typical differential amplifier 10, comprising NPN bipolar transistors Q1 and Q2, that amplifies the differential signals Vinp and Vinn, where Vinp is designated as the non-inverted signal, and Vinn is designated as the inverted signal. The signals will typically swing between a positive rail voltage and ground or swing between positive and negative rail voltages. The total current through the respective load resistors R1 and R2 is the tail current I1. The tail current I1 is generated by a tail current transistor Q3 (an NPN bipolar transistor) receiving a fixed DC bias voltage Vbias. An operational amplifier (op amp) 16 converts the differential output of the differential amplifier 10 to a single ended output Vout and provides gain.
Slew rate is the speed (change in voltage with time) at which Vout changes when a large step function occurs between Vinp and Vinn. Compensation capacitors (e.g., capacitor 18), tail current I1, and other factors affect slew rate. One way to increase slew rate is to provide a larger tail current I1 for the amplifier 10. However, with such a large tail current stability is degraded. In the process of improving the stability, the amplifier noise, voltage offset, and voltage offset drift are often degraded.
U.S. Pat. No. 4,797,629, to Widlar, discloses a tail current circuit that varies with the differential input voltage but common mode rejection ratio (CMRR) is degraded. CMRR is degraded because, in an actual circuit, the Widlar tail current would change somewhat with common mode signals.
What is needed is a circuit that improves the slew rate of an operational amplifier while not degrading the common mode rejection ratio (CMRR), noise, voltage offset, and voltage offset drift.